Pacakrd Bell Bolos M/Board

bolos board diagram

Specification

BIOS : AMI
Chipset : Chipset consists of the AMD 761Northbridge controller, and of the VIA 686B Southbridge controller.
CPU Support :Socket A. Supports AMD Duron and Athlon processors at 1 to 1.4 GHz
- AMD processors are available with 100 or 133 Mhz host bus speed (or front side bus) which is multiplied to achieve the actual clock speed. Because AMD processors have a feature called "double pump" they are able to double the data bandwidth to 200 or 266 MHz. For this reason AMD CPU's are often referred to as having a host bus speed of 200/266 MHz instead of 100/133 MHz. The lower numbers indicate the actual host bus speed, the higher numbers refer to the effective data bandwith.
- 100/133 (200/266) MHz Host bus speed processors are supported on motherboards revision 700 and higher. Before revision 700 the motherboard will be shipped with a 100 MHz host bus speed processor, the jumper J51 on those motherboards will be set open by default. On revisions 700 and higher of this motherboard jumper J51 will be set according to the requirements of the processor the system was shipped with. See the table below for details
- Revision History
  
  Partnumbers Revision # Supported CPU
  host bus speed Effective data
  bandwidth
  
  6815410500 2.2 B1 100 200
  
  6815410700 3.0 B2 100 / 133 200 / 266
  
  6815410800 3.0 B3 100 / 133 200 / 266
Form Factor : ATX (230 x 305 mm) Form Factor
RAM :
- Supports 2 memory slots, compatible with SDRAM DDR memory modules
- Data bus frequency: 200 MHz / 266 MHz
- ECC memory checking is supported
- Maximum memory supported: 1 GB
- DDR memory supports high-speed 200 MHz (PC200) and 266 MHz (PC266) modules
- DDR Memory is, similar to the CPU host speed bus, often described by data bandwidth rather then by actual clock-speed. In the PC-industry the DDR memory modules PC200 and PC266 are therefor also known as PC1600 and PC2100.
- DRAM support: 32/64/128/256/512 MB

Partnumbers	Revision #	Supported CPU host bus speed	Effective data bandwidth
6815410500	2.2 B1	100	200
6815410700	3.0 B2	100 / 133	200 / 266
6815410800	3.0 B3	100 / 133	200 / 266

Jumpers

Jumper	Configuration
JP5 - Clear CMOS Jumper (CMOS)	1-2: Normal operation (default) 2-3: Clear current BIOS default settings
J18 - Suspend To RAM (STR)	Open: Disable STR mode Close: Enable STR mode (default)
J6 - Rear USB Device Wake Up Selection	1-2: Enable Rear USB Device Wake Up (default) 2-3: Disable Rear USB Device Wake Up
J8 - Front USB Device Wake Up Selection	1-2: Enable Front USB Device Wake Up (default) 2-3: Disable Front USB Device Wake Up
JP1 - DDR DIMM support	1-2: Registered DIMM support 2-3: Unbuffered DDR DIMM support (default)
JP51 - 100/133 MHz support	Open: 100 MHz (default) Close: 133 MHz
J50 - Rear USB Device Wake Up Selection	1-2: Enable Rear USB Device Wake Up (default) 2-3: Disable Rear USB Device Wake Up

Note about the USB features: There is support for 4 USB ports on the motherboard, all of which are active at the same time (thus no need for a USB selection jumper). The jumper J6 and J8 are used to activate Wake up from S3 state (one of the ACPI sleep modes) via a USB device (keyboard, mouse...) connected to one of the USB ports/headers.